Danilo Pau, STMicroelectronics

Technical Director, IEEE AAIA & ST Fellow; NAAI, APSIPA Life, Sigma-Xi member, System Research and Applications; STMicroelectronics, Agrate Brianza Italy

Time: 13:30~16:50, September 22 (3 hours in total, including presentation and examples)

Room: Building 200S, Room 00.04

Requirements for the attendees: own laptop, internet connection, login to ST the ST Developer Cloud, own tflite or onnx fp32 and int8 quantized neural networks.

Overview

Due to the advent of Generative AI, data centers are evolving into compute centers, capable of running training workloads. Moreover, they are required to host hundreds of thousands of energy-hungry GPUs. This has created huge implications for humanity and the planet, such as the need to deploy modular and scalable nuclear reactors close to them, increased CO2 emissions, electronic waste, and water consumption. Only a few enterprises have the financial resources to afford the research and development associated with more complex GenAI approaches and to train trillion-weight (and above) Generative AI workloads.

All that has dramatically increased the digital divide, which is becoming hard to minimize and impossible to afford for less-developed countries. Therefore, the embedded industries and research community are called to devise breakthrough solutions.

One essential direction is to deploy AI at the edge, which is proven to be scalable, energy-efficient, data privacy-oriented, and very important, be affordable to students, researchers, young professionals, and engineers. Tiny Machine Learning and Embedded engineers urge productive and interoperable Edge AI tools to support them in being faster to deploy their creativity more than ever. Devising breakthrough applications for automotive, IoT, consumer, medical, industrial, robotics, etc., a unified workflow across heterogeneous tiny devices is mandatory to ease adoption. Any fragmentation of the workflow with respect to the underlying hardware adopted will miserably limit ML engineers’ creativity and capability to serve their stakeholders in the most efficient way.

Therefore, this tutorial will talk and demo the Unified AI Core Technology. It solves the above challenges and acts as the enabling technology to serve ST heterogeneous products such as micro-controllers, multi-processors, and sensors. Furthermore, this technology interfaces with the most widely used Deep Learning representations, such as Google Keras, QKeras, and Tensorflow Lite, and the Open Neural Network Exchange (ONNX). It outputs optimized C code across heterogeneous instruction set processors with public APIs: for STM32, STM32N6, Stellar MCUs, and MEMS sensors. With that free-of-charge solution, ST helps the machine learning and embedded developer community to use the IDE they are comfortable with to finalize their application of choice with unprecedented execution speed. Demonstrations of the tool in action, such as via scripting and the ST Developer Cloud, on ST MCUs and Sensors, will be provided to the audience.